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Saturday, February 10, 2007

ECE121 Experiment No. 6 - UJT-SCR Time Delay Circuit

UJT-SCR Time Delay Circuit

Laboratory Exercise No. 6

Performance Objectives

A. Demonstrate the operation of a UJT-SCR time delay circuit.

B. Calculate and measure the time period of a UJT-SCR time delay circuit.

Equipment and Materials

ü Power Source 0-12 Vdc, 500mA

ü Electronic VOM

ü Oscilloscope

ü Bread board

ü C1 10μF, electrolytic

ü CR1 Silicon Diode, IN4004

ü DS1, DS2 Miniature lamps

ü Q1 UJT, 2N2646

ü Q2 SCR C106B1

ü R1 270Ω, 1W

ü R2 4.7KΩ, 1W

ü R3 500KΩ, ½ W Potentiometer

ü R4 100Ω, 1W

ü R5 470Ω, 1W

ü S1 SPST

ü S2 PBNC

Objective A. Demonstrate the operation of a UJT-SCR time delay circuit.

1. a) Connect the circuit shown in Fig. 7-1. Leave S1 open.

b) Adjust R3 to about mid-position.

c) Adjust the power supply to 12Vdc.

d) Close S1 and wait about 5 seconds. Do S1 and DS2 light? Yes.



Figure 7-1

e) Do DS1 and DS2 remain lit? Yes.

f) Depress S2 momentarily and then release it. Do DS1 and DS2 go out? Yes.

g) Do DS1 and DS2 light again after about 5 seconds? Yes.

h) Adjust R3 to increase the timing circuit resistance.

i) Depress and release S2. Does increasing the resistance of R3 make the time delay period longer? Explain.

Yes. Varying the resistance determines the time the capacitor charges to Vpeak thus increasing the resistance value makes it longer for the capacitor to charge for the UJT to short which triggers the SCR to turn on, as seen in the lamps when they light on.

j) Would decreasing the resistance of R3 shorten the time delay period? Explain.

Yes. Decreasing the value of R3 shortens the time delay since it just needs a short time for the capacitor to charge to its Vpeak value. After a quick charge, it then discharges and supplies voltage to the UJT component.

k) Adjust R3 to decrease the timing delay circuit resistance.

l) Depress and release S2. Is the time delay shorter than before? Yes.

Objective B. Calculate and measure the time period of a UJT-SCR time delay circuit.

2. a) Readjust R3 to mid-position.

b) Connect the oscilloscope vertical input leads between the emitter of Q1 and circuit common. Set the oscilloscope controls for dc mode operation, a slow sweep speed and a convenient vertical deflection.

c) Depress and release S2. What does the gradually increasing oscilloscope waveform represent?

The increasing waveform represents the charge of the capacitor going to its Vpeak value.

d) What terminates the oscilloscope sweep?

The time the capacitor reaches its Vpeak and the start of its discharge time.

e) Depress and release S2 and record the maximum voltage across C1.

EC3 = 10 Volts

f) What does the amplitude of this voltage represent with regard to the UJT?

This is the maximum voltage value it reaches during the capacitor’s charging time before it supplies voltage to the UJT and triggers the SCR to switch on so that the lamps will also be turned on.

g) Adjust R3 for minimum trigger circuit resistance.

h) Assume R3 has no resistance when set to minimum. Calculate the time period of the time delay circuit using the values of R2 and C1.

T = RC = (4.7K)(10μF)

T = 47 msec

i) Depress and release S2 and measure the changing time constant of C1 using the oscilloscope.

T = 44 msec

j) Compare your calculated and measured time periods. Do they agree? Explain.

Yes. The values for the calculated and measured time periods agree since, R3 set to its minimum, calculating the RC time constant is the time when the capacitor C1 charges to its Vpeak – also ideally the same when it is actually measured.

k) Open S1 and reduce the power supply voltage to zero.

Conclusion

  • In a UJT-SCR time delay circuit in this experiment, which consists of a UJT triggering the SCR component so that delay in time is achieved, increasing the resistance also increases the time delay output of the circuit. This is so because it takes a longer time for the capacitor to charge. When it reaches Vpeak, it discharges and supplies voltage to UJT to short then triggers the SCR to turn on. While decreasing the resistor value also shortens the time delay period of the circuit. Therefore, varying the resistance for a timing delay circuit using UJT and SCR, determines the time delay period.

  • The calculated and measured time periods in a UJT-SCR time delay circuit across the capacitor both agree since they have the same RC time constant values which is defined by T=RC. Also, the time period increasing amplitude in the oscilloscope represents the voltage peak value of the capacitor during which the time it charges. After it saturates, the voltage across the capacitor discharges thereby producing a drop in the waveform as seen in the oscilloscope.

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7 Comments:

Anonymous Anonymous said...

penge nmn figure nito.. :)

March 14, 2012 at 6:27 PM

 
Blogger eAsy said...

please show us the schematic diagram... thank you ^^

March 17, 2012 at 8:57 PM

 
Blogger Unknown said...

send me ur schematic diagram pls. here's my email. niconaurcel@gmail.com

July 20, 2013 at 9:09 AM

 
Anonymous Anonymous said...

circuit diagram
kattamanchibindu@gmail.com

October 10, 2017 at 10:38 AM

 
Blogger Unknown said...

Pls send me circuit diagram to Kiran.naik76@gmail.com

October 25, 2017 at 2:52 AM

 
Blogger Unknown said...

Can u plz upload o/p w/f of time delay ckt using scr and ujt

September 8, 2018 at 12:43 AM

 
Blogger samee said...

Please continue this great work and I look forward to more of your awesome blog posts. pre delay calculator

February 17, 2022 at 2:17 AM

 

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